1. Field of the Invention
The present invention relates to semiconductor devices of chip-on-chip structure. The invention further relates to a semiconductor chip to be bonded to a surface of a solid body (e.g., semiconductor chip or wiring board). The invention still further relates to an assembling process for a semiconductor device of chip-on-chip structure.
2. Description of Related Art
For substantial increase in integration level, attention has been directed to semiconductor devices of chip-on-chip structure in which semiconductor chips are arranged in a double-stacked relation.
In such a semiconductor device, more specifically, the semiconductor chips to be stacked each have pad openings formed in a device formation surface thereof to partly expose internal interconnections. Electrode projections called “bumps” are respectively provided on the pad openings. These semiconductor chips are stacked in a face-to-face relation.
One of the semiconductor chips, for example, has a larger size than the other semiconductor chip, and serves as a mother chip or primary chip which has electrodes for external connection. For example, the electrodes are provided on the device formation surface of the primary chip. The electrodes of the primary chip are electrically connected to electrodes on an underlying substrate (wiring board), and external connection electrodes are provided on the underlying substrate. For mounting of the semiconductor device, the external connection electrodes of the underlying substrate are connected to a printed board or a ceramic board by soldering.
In the case of the semiconductor device of chip-on-chip structure, it is important to properly position the semiconductor chips with respect to each other. Improper positioning often makes it impossible to bond the corresponding bumps of the two semiconductor chips to each other.
Conventionally, the positioning accuracy is determined by the accuracy of mechanical alignment of the substrates on which the semiconductor chips are respectively mounted. However, there is a possibility that misalignment of the semiconductor chips occurs due to erroneous recognition by a machine.
One possible approach to this problem is to detect exact alignment of the bumps by detecting coincidence of images of the bumps formed through total reflection by optical prisms when the two semiconductor chips are stacked. However, this optical approach requires much time and labor, making it difficult to improve the productivity.